1. Field of the Invention
The invention relates to a semiconductor apparatus and, more particularly, to a semiconductor integrated circuit having an antifuse using a bipolar transistor.
2. Description of the Related Art
FIGS. 10A and 10B show a cross sectional view of a conventional antifuse using one bipolar transistor (hereinafter, referred to as a “1-transistor type antifuse”) and its circuit diagram. A fuse-writing method (writing of information) of the 1-transistor type antifuse will now be described.
When an electric potential of a data line 2 at a position where it is intended to execute the fuse-writing is fixed and an electric potential of a word line 3 is raised, a reverse bias is applied between an emitter 16 and a base 17. When a voltage between the emitter and the base reaches a breakdown voltage of an emitter-base junction, the junction is broken and an ohmic connection is obtained. On the other hand, since a forward bias has been applied to a base-collector junction, the base-collector junction is not broken. In this manner, only the junction between the emitter and the base in the portion where it is intended to write information is broken and the base-collector junction is used as a diode element even after the fuse-writing. The antifuse is constructed by a plurality of antifuses which use the data line 2 in common and have a plurality of word lines 3. By sequentially reading out information of the antifuse connected to one word line 3 selected by increasing the electric potential, a plurality of information can be efficiently read out and written. That is, if the emitter-base junction has been broken, the data line is set to the high electric potential through the selected word line 3 and the information-written antifuse. If the emitter-base junction is not broken, the data line 2 is set to the low electric potential because of a high resistance which gently fixes the data line (not shown) to the low electric potential. In this instance, the diode element according to the base-collector junction operates as a separating circuit for preventing an influence from being exercised on the data line even if the other non-selected word lines 3 are at the low electric potential.
However, in association with the progress of miniaturization of a manufacturing process, it has been found out by the examination of the present inventors et al. that according to the 1-transistor type antifuse of the related art, not only the emitter-base junction but also the base-collector junction is simultaneously broken. That is, the base-collector junction is also simultaneously broken by a damage at the time when the emitter-base junction is broken due to the realization of the thin emitter-base junction and the thin base-collector junction and the fineness for reducing a parasitic capacitance of a bipolar element. Therefore, the data line 2 is fixed to the low electric potential because of the non-selected word lines 3, the information is written into the antifuse connected to the selected word line 3, and although the high electric potential is expected in the data line, the value of the data line is set to the wrong low electric potential due to the broken base-collector junction of the non-selected antifuse, so that the apparatus operates erroneously. Consequently, it cannot be used as an antifuse.
Therefore, prior to the present invention, the present inventors have examined an antifuse using two bipolar transistors (hereinafter, referred to as a “2-transistor type antifuse”). FIGS. 11A and 11B show a cross sectional view of the 2-transistor type antifuse and its circuit diagrams. The 2-transistor type antifuse is constructed by a bipolar transistor Q1 whose junction is broken and a bipolar transistor Q2 whose junction is not broken. In each of the bipolar transistor Q1 whose junction is broken and the bipolar transistor Q2 which is intended to be left as a diode element without breaking the junction, a circuit between a collector and a base is short-circuited.
A fuse writing method of the 2-transistor type antifuse will now be described. When the electric potential of the data line 2 of a portion where it is intended to cut the fuse is fixed and the electric potential of the word line 3 is raised, a reverse bias is applied between the emitter 16 and the base 17 of the bipolar transistor Q1 whose junction is broken. When the bias reaches a breakdown voltage of the junction, the junction is broken. On the other hand, since a forward bias has been applied between the emitter and the base of the bipolar transistor Q2 whose junction is not broken, the junction is not broken. A voltage obtained by subtracting an amount of a voltage drop due to the forward voltage between the emitter and the base of the bipolar transistor Q2 whose junction is not broken from the voltage of the word line 3 is applied between the emitter and the base of the bipolar transistor Q1 whose junction is broken.
In the connection of the diodes in FIGS. 10A and 10B and the connection of the diodes in FIGS. 11A and 11B, although the order of the breakdown/non-breakdown is reversed [from (word line—breakdown Q1—non-breakdown Q2—data line) to (word line—non-breakdown Q2—breakdown Q1—data line)], the invention is not limited to such order but can be applied to any case. However, it has been found that when it is intended to write information into the fuse in the 2-transistor type bipolar antifuse, the voltage which is applied to break the junction exceeds a withstanding voltage of a peripheral element, and the peripheral element is also broken simultaneously with the breakdown of the junction of the bipolar transistor. It has also been found that if a large current is supplied in order to break the junction of the bipolar transistor Q1, there is a possibility that the junction of the bipolar transistor Q2 whose junction is not broken is also broken.